Computer Architecture and Organization: Key Concepts
1. Define Computer Architecture
Computer architecture is defined as the functional operation of the individual hardware units in a computer system and the flow of information among the control of those units.
2. Define Computer Hardware
Computer hardware is the electronic circuit and electromechanical equipment that constitutes the computer.
3. What is Meant by Cache Memory?
Cache memory is a smaller, faster memory that is interposed between the CPU and main memory. The cache acts as a buffer for recently used memory locations.
4. What is Locality of Reference?
Many instructions in localized areas of the program are executed repeatedly during some time period, and the remainder of the program is accessed relatively infrequently. This is referred to as locality of reference.
5. What is I/O Mapped Input/Output?
In I/O mapped input/output, a memory reference instruction activates the READ M or WRITE M control line and does not affect the I/O device. Separate I/O instructions are required to activate the READ IO and WRITE IO lines, which cause a word to be transferred between the addressed I/O port and the CPU. The memory and I/O address spaces are kept separate.
6. Specify the Three Types of DMA Transfer Techniques
- Single transfer mode (cycle stealing mode)
- Block transfer mode (burst mode)
- Demand transfer mode
- Cascade mode
7. Why is a Memory Refreshing Circuit Needed?
All cells on the corresponding row need to be read and refreshed during both read and write operations. The contents of dynamic RAM are maintained, and each row of cells must be accessed periodically, once every 2–16 ms. Refresh circuits usually perform this function automatically.
8. What are the Functions of the Control Unit?
The memory, arithmetic and logic, and input and output units store and process information and perform I/O operations. The operation of these units must be coordinated in some way; this is the task of the control unit. The control unit is effectively the nerve center that sends control signals to other units and senses their states.
9. What is an Interrupt?
An interrupt is an event that causes the execution of one program to be suspended and another program to be executed.
10. What are the Uses of Interrupts?
- Recovery from errors
- Debugging
- Communication between programs
- Use of interrupts in operating systems
11. Define Vectored Interrupts
In order to reduce the overhead involved in the polling process, a device requesting an interrupt may identify itself directly to the CPU. Then, the CPU can immediately start executing the corresponding interrupt service routine. The term “vectored interrupts” refers to all interrupt handling schemes based on this approach.
12. What is the Need for a Reduced Instruction Chip?
- Relatively few instruction types and addressing modes.
- Fixed and easily decoded instruction formats.
- Fast single-cycle instruction execution.
- Hardwired rather than microprogrammed control.
13. Name any Three of the Standard I/O Interfaces
- SCSI (Small Computer System Interface) bus standards
- Backplane bus standards
- IEEE 796 bus (Multibus signals)
- NUBUS
- IEEE 488 bus standard
15. Explain the Pipeline Types
- Instruction pipeline
- Arithmetic pipeline
16. Explain the Various Classifications of Parallel Structures
- SISD (Single Instruction Stream, Single Data Stream)
- SIMD (Single Instruction Stream, Multiple Data Stream)
- MIMD (Multiple Instruction Stream, Multiple Data Stream)
- MISD (Multiple Instruction Stream, Single Data Stream)
17. What is Absolute Addressing Mode?
The address of the location of the operand is given explicitly as a part of the instruction.
Example: MOVE A, 2000
18. Specify Three Types of Data Transfer Techniques
- Arithmetic data transfer
- Logical data transfer
- Programmed control data transfer
19. What is the Role of MAR and MDR?
The MAR (Memory Address Register) is used to hold the address of the location to or from which data are to be transferred. The MDR (Memory Data Register) contains the data to be written into or read out of the addressed location.
20. What are the Various Types of Operations Required for Instructions?
- Data transfers between the main memory and the CPU registers
- Arithmetic and logic operations on data
- Program sequencing and control
- I/O transfers
21. What is the Role of IR and PC?
The Instruction Register (IR) contains the instruction being executed. Its output is available to the control circuits, which generate the timing signals for controlling the processing circuits needed to execute the instructions. The Program Counter (PC) register keeps track of the execution of the program. It contains the memory address of the instruction currently being executed. During the execution of the current instruction, the contents of the PC are updated to correspond to the address of the next instruction to be executed.
22. Define Memory Access Time
The time that elapses between the initiation of an operation and the completion of that operation—for example, the time between the READ and the MFC signals—is referred to as memory access time.
23. Define Memory Cycle Time
The minimum time delay required between the initiations of two successive memory operations—for example, the time between two successive READ operations.
24. Define Static Memories
Memories that consist of circuits capable of retaining their state as long as power is applied are known as static memories.
25. Distinguish Between Static RAM and Dynamic RAM
Static RAMs are fast, but they come at a high cost because their cells require several transistors. Less expensive RAM can be implemented if simpler cells are used. However, such cells do not retain their state indefinitely; hence, they are called dynamic RAM.
26. Distinguish Between Asynchronous DRAM and Synchronous RAM
Specialized memory controller circuits provide the necessary control signals, RAS and CAS, that govern the timing. The processor must take into account the delay in the response of the memory. Such memories are referred to as asynchronous DRAMs. The operations of synchronous DRAM are directly synchronized with a clock signal.
27. What are the Various Units in a Computer?
- Input unit
- Output unit
- Control unit
- Memory unit
- Arithmetic and logical unit
28. What is an I/O Channel?
An I/O channel is actually a special-purpose processor, also called a peripheral processor. The main processor initiates a transfer by passing the required information to the input/output channel. The channel then takes over and controls the actual transfer of data.
29. What is a Bus?
A collection of wires that connects several devices is called a bus.
30. Define Word Length
Each group of n bits is referred to as a word of information, and n is called the word length.
32. What is Straight-Line Sequencing?
The CPU control circuitry automatically proceeds to fetch and execute instructions, one at a time, in the order of increasing addresses. This is called straight-line sequencing.
33. What is the Role of the PC?
The CPU contains a register called the program counter, which holds the address of the instruction to be executed next. To begin the execution of a program, the address of its first instruction must be placed into the PC.
34. What are the Steps for the Execution of a Complete Instruction?
- Fetch the instruction.
- Fetch the first operand (the contents of the memory location pointed to by the address field of the instruction).
- Perform the calculation.
- Load the result.
35. What is a Bit Slice?
A bit slice is a “slice” through the data path of a typical processor. It contains all circuits necessary to provide ALU functions, register transfers, and control functions for only a few bits of the data path.
36. What is DMA?
A special control unit may be provided to enable the transfer of a block of data directly between an external device and memory without continuous intervention by the CPU. This approach is called DMA.
37. Why is Program-Controlled I/O Unsuitable for High-Speed Data Transfer?
- In program-controlled I/O, considerable overhead is incurred because several program instructions have to be executed for each data word transferred between the external device and main memory.
- Many high-speed peripheral devices have a synchronous mode of operation. That is, data transfers are controlled by a clock of a fixed frequency, independent of the CPU.
38. What is the Function of the I/O Interface?
The function of the I/O interface is to coordinate the transfer of data between the CPU and external devices.
39. What is NUBUS?
A NUBUS is a processor-independent, synchronous bus standard intended for use in 32-bit microprocessor systems. It defines a backplane into which up to 16 devices may be plugged, each in the form of a circuit board of standard dimensions.
40. What do you Mean by Associative Mapping Technique?
The tag of an address received from the CPU is compared to the tag bits of each block of the cache to see if the desired block is present. This is called the associative mapping technique.
41. What is the LRU Replacement Algorithm?
When a block is to be overwritten, it is sensible to overwrite the one that has gone the longest time without being referenced. This block is called the least recently used block, and the technique is called the LRU replacement algorithm.
42. Explain Virtual Memory Technique
Techniques that automatically move program and data blocks into physical memory when they are required for execution are called virtual memory techniques.
43. What are Virtual and Logical Addresses?
The binary addresses that the processor issues for either instructions or data are called virtual or logical addresses.
44. Define Translation Buffer
Most commercial virtual memory systems incorporate a mechanism that can avoid the bulk of the main memory access called for by the virtual-to-physical address translation. This may be done with a cache memory called a translation buffer, which retains the results of recent translations.
45. Name Some I/O Devices
- Video terminals
- Video displays
- Alphanumeric displays
- Graphics displays
- Flat panel displays
- Printers
- Plotters
46. What is a Branch Delay Slot?
The location containing an instruction that may be fetched and then discarded because of a branch is called a branch delay slot.
47. What is Optical Memory?
Optical or light-based techniques for data storage, such memories usually employ optical disks, which resemble magnetic disks in that they store binary information in concentric tracks on an electromechanically rotated disk. The information is read or written optically, however, with a laser replacing the read/write arm of a magnetic disk drive. Optical memory offers high storage capacities, but their access rates are generally less than those of magnetic disks.
48. What is Microprogrammed Control?
Microprogrammed control is a method in which control signals are generated by a program similar to a machine language program. A sequence of one or more micro-operations, such as addition or multiplication, is called a microprogram. The addresses where these microinstructions are stored in control memory are generated by microprogrammed control.
49. What is Microprogramming?
A sequence of control words corresponding to the control sequence of a machine instruction constitutes the micro-routine for that instruction, and the individual control words in this micro-routine are referred to as microinstructions. Microprogramming is a method of control unit design in which the control signal selection and sequencing information is stored in a ROM or RAM called a control memory (CM).
50. What are Static and Dynamic Memories?
Static memories are memories that do not require periodic refreshing. Dynamic memories are memories that require periodic refreshing.
51. What are the Steps Required for a Pipelined Processor to Process an Instruction?
- F (Fetch): Read the instruction from the memory.
- D (Decode): Decode the instruction and fetch the source operand(s).
- E (Execute): Perform the operation specified by the instruction.
- W (Write): Store the result in the destination location.
52. What are the Steps Taken When an Interrupt Occurs?
- Source of the interrupt
- The memory address of the required interrupt service program (ISP)
- The program counter and CPU information are saved in a subroutine.
- Transfer control back to the interrupted program.
53. Define Instruction Pipeline
Instruction pipelining is the transfer of instructions through various stages of the CPU instruction cycle, including fetch opcode, decode opcode, compute operand addresses, fetch operands, execute instructions, and store results. This amounts to realizing most or all of the CPU in the form of a multifunction pipeline called an instruction pipeline.
54. Define Latency
The term “memory latency” is used to refer to the amount of time it takes to transfer a word of data to or from the memory. The term “latency” is used to denote the time it takes to transfer the first word of data. This time is usually substantially longer than the time needed to transfer each subsequent word of a block.
55. Define Bandwidth
Bandwidth is a product of the rate at which the data are transferred (and accessed) and the width of the data bus.
56. Define Hit Rate
A successful access to data in a cache is called a hit. The number of hits stated as a fraction of all attempted accesses is called the hit rate.
57. Define Miss Rate
A miss rate is the number of misses stated as a fraction of attempted accesses. The extra time needed to bring the desired information into the cache is called the miss penalty.
58. Distinguish Between System Space and User Space
Assembling the operating system routine into a virtual address space is called system space, which is separate from the virtual space in which user application programs reside. The latter space is called user space.
60. Define Combinational Circuit
A combinational circuit is a connected arrangement of logic gates with a set of inputs and outputs. A combinational circuit transforms binary information from the given input data to the required output data. Combinational circuits are employed in digital computers for generating binary control decisions and for providing digital components required for data processing.
61. Define Sequential Circuits
A sequential circuit is an interconnection of flip-flops and gates. The gates by themselves constitute a combinational circuit, but when included with the flip-flops, the overall circuit is classified as a sequential circuit.
62. Define Interface
The word “interface” refers to the boundary between two circuits or devices.
63. Define Pipelining
Pipelining is a technique of decomposing a sequential process into sub-operations, with each sub-process being executed in a special dedicated segment that operates concurrently with all other segments.
64. Define Parallel Processing
Parallel processing is a term used to denote a large class of techniques that are used to provide simultaneous data-processing tasks for the purpose of increasing the computational speed of a computer system. Instead of processing each instruction sequentially as in a conventional computer, a parallel processing system is able to perform concurrent data processing to achieve faster execution time.
65. What are the Components of a Memory Management Unit?
- A facility for dynamic storage relocation that maps logical memory references into physical memory addresses.
- A provision for sharing common programs stored in memory by different users.
- Protection of information against unauthorized access between users and preventing users from changing operating system functions.
66. What is Programmed I/O?
Data transfer to and from peripherals may be handled using this mode. Programmed I/O operations are the result of I/O instructions written in the computer program.