Computer System Architecture: CPU, Memory, and I/O
Operating System Fundamentals
The operating system (OS) is a program that acts as an intermediary between a user and the computer hardware (OS kernel). It runs on a computer and strongly depends on its architecture (CPU, bus, devices…).
OS Goals:
- Execute user programs and make solving user problems easier.
- Make the computer system convenient to use.
Processor (CPU)
The processor executes instructions only from memory. It operates in two modes:
- System mode (privileged): Can perform all operations.
- User mode (restricted): Special operations are disabled (those that modify the system), such as reset, halt, disable, and I/O instructions.
The CPU has two internal registers:
- Memory Address Register (MAR): Specifies the address for the next read or write.
- Memory Buffer Register (MBR): Contains data written into memory or receives data read from memory.
Instruction Execution
The CPU works in steps defined by a clock signal. There are two main steps:
- The processor reads instructions from memory (fetches from main memory).
- The processor executes each instruction.
The Program Counter (PC) holds the address of the instruction to be fetched next and is incremented after each fetch.
Control and Status Registers
- Program Counter (PC): Holds the address of the next instruction.
- Instruction Register (IR): Contains the most recently fetched instruction.
- Program Status Word (PSW): Contains condition codes, interrupt enable/disable, and supervisor/user mode. Used by privileged OS routines to control program execution.
User-Visible Registers
These registers enable programmers to minimize main-memory references by optimizing register use. They may be referenced by machine language and are available to all application and system programs. There are two types:
- Data Registers
- Address Registers (Index, Segment pointer, Stack pointer)
Interrupts
Interrupts stop the normal sequencing of the processor. Most I/O devices are slower than the processor. Interrupts enable the parallel run of the CPU and external devices. They are numbered 0-255 (00-FF), specifying different types of interrupts (Program, timer, I/O, Hardware failure). An interrupt handler is a program to service a particular I/O device, generally part of the OS, that suspends the normal sequence of execution.
Memory Hierarchy
Memory hierarchy is characterized by:
- Faster access time, greater cost per bit (Cache memory is fast but expensive).
- Greater capacity, smaller cost per bit, and slower access speed.
Cache Memory
Cache memory is invisible to the operating system. It increases memory speed because processor speed is faster than memory speed. It exploits the principle of locality.
Cache Design:
- Size: Small caches have a significant impact on performance.
- Block size: Data exchanged between cache and main memory.
- Mapping function: Determines which cache location the block will occupy.
- Replacement algorithm: Uses Least-Recently-Used (LRU) algorithm.
- Write policy: When the memory write operation takes place, it can occur every time a block is updated or only when a block is replaced.
Secondary Memory
Secondary memory is nonvolatile and stores data and programs. Examples include hard drives, SSDs, CDs, and Blu-ray discs.
Disk Cache
Disk cache is a portion of main memory used as a buffer to temporarily hold data for the disk. It is organized by the OS, and disk writes are clustered.
Programmed I/O
In programmed I/O, the I/O module performs the action, not the processor. It sets appropriate bits in the I/O status register. No interrupts occur. The processor checks the status until the operation is complete.
Interrupt-Driven I/O
In interrupt-driven I/O, the processor is interrupted when the I/O module is ready to exchange data. The processor saves the context of the program executing and begins executing the interrupt handler. This avoids needless waiting. However, it consumes a lot of processor time because every word read or written passes through the processor.
Direct Memory Access (DMA)
DMA transfers a block of data directly to or from memory. An interrupt is sent when the transfer is complete. The processor continues with other work. I/O exchanges occur directly with memory. The processor grants the I/O module authority to read from or write to memory, relieving the processor of the responsibility for the exchange.