CPU Architecture: Components and Functions
Central Processing Unit (CPU)
1. The Control Unit (CU)
The control unit governs the other units, interpreting and executing instructions while monitoring their sequence. It receives and interprets information, sending precise orders to the necessary elements for correct data processing.
Components of the Control Unit:
- Program Counter (PC): A sequence control register containing the memory address of the next instruction to execute, ensuring proper instruction sequencing. When a program starts, the PC holds the address of the first instruction and increments automatically after each instruction unless a jump or break occurs.
- Instruction Register (IR): Holds the currently executing instruction, including the operation code and operands or their memory addresses.
- Decoder (D): Extracts the opcode from the IR, analyzes it, and sends signals to other elements for execution through the sequencer.
- Sequencer (S): Generates basic commands, synchronized by the clock, to execute the instruction in the IR step-by-step.
- Clock (R): Provides electrical pulses at constant intervals, marking the timing for each instruction step.
2. Arithmetic Logic Unit (ALU)
The ALU processes all arithmetic (+, -, *, /) and logical (AND, OR, NOT, etc.) operations.
Components of the ALU:
- Input Registers (REN): Store the data or operands used in an instruction.
- Operational Circuit (COP): Contains the circuitry to perform operations on data from the input registers, receiving commands for the type of operation (add, subtract, and, or, etc.).
- Accumulator Register (RA): Stores the results of operations performed by the COP. It connects to the input registers for feedback in chained operations and to the data bus to send results to main memory or the control unit.
- Status Register (RES): A set of flip-flops recording conditions from the last operation (e.g., overflow, sign) for use in subsequent operations by the sequencer.
3. Main Memory (Main or Internal)
Stores the programs (instructions) and data needed for a process. Programs and data must be loaded into memory for execution. Cache memory, a set of fast-access registers within modern processors, stores frequently used information.
The core memory consists of numbered cells or memory locations that retain information while the computer is on. These numbered cells are memory addresses, allowing direct access for reading or writing.
Elements Associated with Main Memory:
- Memory Address Register (MAR): Holds the address of the memory cell being accessed for read or write operations.
- Memory Data Register (MDR): An intermediate zone between memory and other units. During a read, information from the addressed cell is stored in the MDR before being sent via the bus. During a write, information is deposited in the MDR via the bus and then transferred to the addressed memory location.
- Memory Selector (SM): Selects the read or write operation, connecting the addressed memory cell with the MDR and enabling data transfer.
Main memory is often called RAM (Random Access Memory), and its size is measured in bytes (or megabytes).
4. System Buses
The circuitry interconnecting and enabling communication between the CPU and other units. These parallel lines transmit data between components.
Bus Characteristics:
- Number of lines: Each line transmits one bit. Early PCs used 8-bit buses, while modern systems use 32 or 64 bits.
- Data transfer rate: Measured in megahertz (MHz), representing thousands of clock cycles per second. Current buses range from 66 MHz to 800 MHz.
Types of Buses:
- Instruction and Data Bus: Bidirectional, moving instructions and data between RAM and other components.
- Control Bus: Unidirectional, transmitting commands from the control unit to other units.
- Address Bus: Unidirectional, transmitting destination addresses for data transmitted via the data bus.
For example, to retrieve information from a memory location, the CPU uses the address bus to specify the location, the control bus to send a read signal, and the data bus to receive the information.