Digital Logic Circuit Design: Boolean Simplification, Decoders, and Multiplexers

Posted on Oct 30, 2024 in Computers

Boolean Simplification using K-Map

Step 1: Identify Terms

The given expression includes:

  1. ABCD
  2. AB’CD
  3. ABCD’
  4. ABC’D
  5. ABD’

Step 2: K-map Setup

We’ll set up a 4-variable K-map for A, B, C, D.

K-map Layout

CD\AB | 00 | 01 | 11 | 10
-------|----|----|----|----
00 | 0  | 0  | 0  | 0
01 | 0  | 1  | 1  | 1
11 | 0  | 1  | 1  | 1
10 | 0  | 1  | 1  | 0

Step 3: Filling the K-map

Now, we fill in the K-map based on the minterms:

  1. For ABCD (1111): Cell (1, 1) = 1
  2. For AB’CD (1011): Cell (1, 0) = 1
  3. For ABCD’ (1110): Cell (0, 1) = 1
  4. For ABC’D (1101): Cell (1, 0) = 1
  5. For ABD’ (1100): Cell (0, 0) = 1

Step 4: Grouping

Group the 1’s:

  1. Group 1: A large rectangle covering cells (1, 0) (includes ABCD, AB’CD, ABCD’, ABC’D) gives AB.
  2. Group 2: A single cell (0, 0) for ABD’.

Step 5: Simplified Expression

The simplified expression is: Y = AB + ABD’

Step 6: Further Simplification

Y = AB(1 + D’) = AB

4-to-16 Decoder using 3-to-8 Decoders

Overview

A 4-to-16 decoder activates one of 16 outputs based on a 4-bit input.

Design Steps

  1. Inputs: A3, A2, A1, A0
  2. Outputs: Y0 to Y15
  3. 1-to-2 Decoder: Use A3 to enable one of two 3-to-8 decoders.
  4. 3-to-8 Decoders: Use A2, A1, A0 to select outputs.

3-Bit Binary to Gray Code Converter

Gray Code Basics

Gray code values differ by one bit.

  • G2 = B2
  • G1 = B2 ⊕ B1
  • G0 = B1 ⊕ B0

Logic Circuit Design

Use XOR gates for conversion.

Canonical SOP using 8:1 Multiplexer

Implementation

Use A, B, C as select lines and set data inputs based on minterms.

Data Inputs

  • D0 = 1
  • D1 = 1
  • D2 = 0
  • D3 = 1
  • D4 = 1
  • D5 = 0
  • D6 = 0
  • D7 = 1