Digital Logic: Flip-Flops, Shift Registers, and Counters
Unit 5: Flip-Flops and Latches
When both inputs to a NOR gate are low, the output will be high. S-R latch circuits have two stable states, making them bistable. Transistor switching occurs in nanoseconds. Timing dependencies causing incorrect output are known as hazards. Combinational circuits lack memory; their output depends solely on inputs. The flip-flop was invented in 1918. A flip-flop changes state at the positive or negative edge of a clock signal. Events drive both asynchronous and synchronous latches. A latch stores a single bit. In an S-R latch, S stands for ‘set’. The JK flip-flop enhances the SR flip-flop (J=Set, K=Reset) by interpreting S=R=1 as a toggle command. During the positive or negative clock edge, the flip-flop output takes the value of D. Latches and flip-flops are memory elements in sequential circuits. Asynchronous latches change state with input changes, regardless of the control signal. Synchronous latches monitor input and change state when the control signal is high. Flip-flop functionality can be explained using cross-coupled NOR or NAND gates. A synchronous sequential circuit consists of flip-flops and combinational gates. A master-slave D flip-flop is constructed by connecting two gated D latches in series. Sequentially operated systems are digital systems performing sequential operations. A flip-flop changes state at the clock signal’s positive or negative edge. An asynchronous latch changes state with input changes, regardless of the control signal. A synchronous latch monitors input and changes state when the control signal is high. A flip-flop has a normal and a complement output. R-S, D, J-K, and T are flip-flop types used in sequential circuit design. Microprocessors are constructed by interconnecting flip-flops to form logic gates. A flip-flop has a normal and a complement output.
Unit 6: Shift Registers and Number Systems
Most data processing logic operates on sets of bits. In Serial-In Serial-Out (SISO), data bits are input and output serially. A Write/Shift (W/S) signal switches between data-input and data-shift modes. Shift registers were built in the 1940s. Old computer architectures used shift registers in the CPU for holding and moving data into the ALU. Data movement through a SISO shift register resembles a hardware-implemented queue. Connecting the inputs and outputs of a SISO shift register creates a circular shift register. SISO stands for Serial Input Serial Output. PIPO stands for Parallel In Parallel Out. The CPU works on data bits stored in registers. Bi-directional shift registers allow data shifting in both directions. When the Read/Write (R/W) line input is set to 1 (or Write), it behaves like a normal SISO register with destructive readout. Most CPUs have machine-level instructions to shift bits left or right in a group. These instructions are shift left and shift right. Shift registers convert between serial and parallel devices. The timing of shift registers is limited by the clock signal. The two operands of addition were first shifted into shift registers and then shifted out into the ALU for addition. The base of the hexadecimal number system is 16. The range for signed magnitude representation is -2n-1-1 to +2n-1-1. MSB ‘1’ represents a positive value, and MSB ‘0’ represents a negative value. Two complements are available in any number system. In the binary system, they are 2’s complement (radix complement) and 1’s complement (diminished radix complement). In the decimal system, they are 10’s complement (radix complement) and 9’s complement (diminished radix complement). The binary number system uses values 0 and 1. The octal number system uses values 0, 1, 2, 3, 4, 5, 6, and 7. The hexadecimal number system uses values 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, and F. The decimal number system uses values 0, 1, 2, 3, 4, 5, 6, 7, 8, and 9.
Unit 7: Counters
A Johnson counter is also called a walking ring counter. A Johnson counter is constructed using a SISO shift register. A ring counter can be constructed using a SISO shift register. In electronics, a counter captures the number of times an event has occurred. Signals are not used in implementing counters. MNC stands for modulo N counter. The maximum number of binary states possible for a group of 5 flip-flops is 32. Circular counters are not a type of counter. Counters are used to show an increase in count value. Many applications require counter outputs in decimal format instead of binary. Modulo-N input lines carry streams of bits, and the output line carries natural numbers between 0 and N-1. A ring counter is a shift register with the output of the last stage connected directly to the input of the first stage. Ring counters are realized by connecting the output of a SISO shift register to its input in a closed chain. In a Johnson counter, the output of the shift register is connected back to the input after passing it through an inverter. Many applications require counter outputs in decimal format instead of binary. One way to achieve this is by using a decoder that decodes the binary output and converts it to decimal form. Counters are digital logic devices. Binary counters can even count BCD (Binary Coded Decimal) numbers. A Johnson counter is constructed using a serial-in and serial-out (SISO) shift register. The output of the shift register is connected back to the input after passing it through an inverter. Depending on the initial bit pattern stored in the shift register, the shift register content changes for every clock, and the bit pattern gets repeated after 2n clocks, where n is the number of bits in the shift register. These are called “walking ring” counters and have specialist applications like digital-to-analog converters (DAC). An octal counter, which counts from 0 to 7, can be realized using a 4-bit Johnson counter. Commercial CMOS integrated circuits that implement this are CD 4017 and 4022. In the design of a Modulo-n Counter, the input lines carry streams of bits, and the output line carries natural numbers between 0 and N-1. In the first design step, or structural refinement, the black box specification is refined into a specification of a controller COL and a counter CNT.