Field-Effect Transistor (FET) Fundamentals
Understanding Field-Effect Transistors (FETs)
A Field-Effect Transistor (FET) uses an electric field to control the electrical behavior of the device. FETs are also known as unipolar transistors since they involve single-carrier-type operation. Many different implementations of field-effect transistors exist. FETs generally display very high input impedance at low frequencies. The conductivity between the *drain* and *source* terminals is controlled by an electric field in the device, which is generated by the voltage difference between the *body* and the *gate* of the device.
FETs can be majority-charge-carrier devices, where the current is carried predominantly by majority carriers, or minority-charge-carrier devices, where the current is mainly due to a flow of minority carriers. The device consists of an active channel through which charge carriers, electrons or holes, flow from the *source* to the *drain*. *Source* and *drain* terminal conductors are connected to the semiconductor through ohmic contacts. The conductivity of the channel is a function of the potential applied across the *gate* and *source* terminals.
FET Terminals
- Source (S): Through which the carriers enter the channel. Conventionally, current entering the channel at S is designated by IS.
- Drain (D): Through which the carriers leave the channel. Conventionally, current entering the channel at D is designated by ID. Drain-to-source voltage is VDS.
- Gate (G): The terminal that modulates the channel conductivity. By applying voltage to G, one can control ID.
FET Operation Principles
The FET controls the flow of electrons (or electron holes) from the *source* to the *drain* by affecting the size and shape of a *conductive channel* created and influenced by voltage (or lack of voltage) applied across the *gate* and *source* terminals. (For simplicity, this discussion assumes that the body and source are connected.) This *conductive channel* is the “stream” through which electrons flow from source to drain.
N-Channel FETs
In an n-channel *depletion-mode* device, a negative *gate-to-source voltage* causes a *depletion region* to expand in width and encroach on the channel from the sides, narrowing the *channel*. If the active region expands to completely close the channel, the resistance of the channel from source to drain becomes large, and the FET is effectively turned off like a switch. This is called *pinch-off*, and the voltage at which it occurs is called the *pinch-off voltage*. Conversely, a positive *gate-to-source voltage* increases the *channel* size and allows electrons to flow easily. In an n-channel *enhancement-mode* device, a conductive channel does not exist naturally within the transistor, and a positive *gate-to-source voltage* is necessary to create one. The positive voltage attracts free-floating electrons within the *body* towards the *gate*, forming a conductive channel. But first, enough electrons must be attracted near the gate to counter the dopant ions added to the *body* of the FET; this forms a region with no mobile carriers called a *depletion region*, and the voltage at which this occurs is referred to as the *threshold voltage* of the FET. Further *gate-to-source voltage* increase will attract even more electrons towards the gate which are able to create a *conductive channel* from *source* to *drain*; this process is called *inversion*.
P-Channel FETs
In a p-channel *depletion-mode* device, a positive voltage from *gate* to *body* creates a *depletion layer* by forcing the positively charged *holes* to the *gate-insulator/semiconductor interface*, leaving exposed a carrier-free region of immobile, negatively charged acceptor ions. Conversely, in a p-channel *enhancement-mode* device, a conductive region does not exist and negative voltage must be used to generate a *conduction channel*.