Microprocessor and Computer Architecture Fundamentals

Posted on Jan 10, 2025 in Computers

Lecture 1: Microprocessor and Computer Architecture

Flynn’s Classification of Computing Systems

  • SISD (Single Instruction, Single Data)
  • MISD (Multiple Instruction, Single Data)
  • SIMD (Single Instruction, Multiple Data)
  • MIMD (Multiple Instruction, Multiple Data)

Microprocessor vs. Microcontroller

A microprocessor is a CPU on a single chip.

A microcontroller includes a microprocessor, supporting circuitry, memory, and peripheral I/O components in a single chip.

Microprocessor Types

Microprocessors are classified based on:

  • Word size
  • Instruction set
  • Functions

Architectures

  • Von Neumann: Uses a single bus for both data and instructions between the CPU and memory.
  • Harvard: Employs separate buses for data and program memory.

Bus Structure

Buses connect the CPU and memory. Typically, they are arranged with the data bus on top, followed by the address bus, and the control bus at the bottom.

Single bus structure: A common bus is used for communication between peripherals and the microprocessor.

Microprocessor and Memory Interconnection

Two registers facilitate data transfer between the main memory and the processor:

  • MAR (Memory Address Register): Holds memory addresses.
  • MDR (Memory Data Register): Holds data.

Additionally, there is an Instruction Register which holds the instruction being executed, and a Program Counter (PC) which points to the next instruction to be fetched.

Interrupt

An interrupt is a request from an I/O device for service by the processor.

ISA (Instruction Set Architecture)

The ISA is the interface between hardware and software. It defines all aspects of a computer architecture visible to a programmer.

Instruction

An instruction is a fundamental part of an ISA, specifying basic operations. It is machine-oriented. Instructions can be written in two languages: machine language and assembly language.

Data Types

Data types include:

  • Numbers
  • Floating-point numbers
  • BCD numbers
  • Non-numeric (Boolean, characters)

Registers

  • General-purpose registers
  • Special-purpose registers:
    • Program Counter register: Stores the memory address of the currently executing instruction.
    • Status register: Contains bits associated with CPU operations.

Addressable Unit Size

The most common addressable unit size is 8 bits (1 byte).

Address Space

The address space is the range of addresses a processor can access. It is limited by the width of the address bus.

Endianness

  • Little Endian: Least significant byte is stored first.
  • Big Endian: Most significant byte is stored first.

Alignment

Multiple bytes can be fetched from memory simultaneously. Alignment makes memory data access more efficient.

Instruction Format

Instruction format defines how instructions are represented in binary code. Instructions consist of an opcode and operands.

Instruction Encoding

  • Operation encoding: 2n operations.
  • Operand encoding: Depends on the addressing modes and address space.

Addressing Modes

Addressing modes are ways of specifying operand locations. They include:

  • Immediate
  • Direct
  • Indirect
  • Register
  • Register indirect
  • Relative
  • Indexed

Instruction Sets

  • RISC (Reduced Instruction Set Computer): All instructions take approximately the same time for execution.
  • CISC (Complex Instruction Set Computer): Instructions can take different amounts of time.

Typical Processors

Examples of typical processors include x86, 68k, MIPS, ARM, PowerPC, and DEC ALPHA 21164.

Instruction Execution Cycle

The instruction execution cycle consists of four phases:

  1. Fetch: The instruction whose address is determined by the PC is obtained from memory and loaded into the IR.
  2. Decode: The instruction in the IR is decoded, and required operands are fetched from registers or memory.
  3. Execute: The instruction is executed.
  4. Write: The result is placed in the appropriate memory location.

Pipelining

  • Latency: The elapsed time from the start to the completion of a particular task.
  • Throughput: The number of tasks that can be completed per unit of time.
  • In-Order Execution: Requires instructions to be executed in the original program order.
  • Out-of-Order Execution: The start of an event is enabled by the availability of its required input.
  • Superscalar Issue: Allows multiple instructions to be issued simultaneously.

Microarchitecture

Microarchitecture refers to the steps a processor takes to execute a particular set of instructions. Its features include:

  • Cache memory
  • Pipelining
  • Out-of-order execution
  • Superscalar issue

Performance

Performance is measured by how long a processor takes to run a program. Time is reduced by increasing the instructions per cycle (IPC) and the clock rate.

Memory Hierarchy

The memory hierarchy consists of the register file, level 1, level 2, and level 3 caches, main memory, and the hard drive.