Computer Architecture: Key Formulas and ISA Comparison

Posted by admin on Feb 28, 2025 in Electrical Engineering | 0 comments

Key Computer Architecture Formulas

Mean Time Between Failures (MTBF) = MTTF + MTTR. Availability (Reliability) = MTTF / MTBF. Failure Rate = 1/ MTTF. Speedup of X relative to Y = Execution timeY / Execution timeX. Speedup = Execution time for entire task without using enhancement / Execution time for entire task using enhancement when possible. Speedup_overall = Executiontime_old / Executiontime_new = 1 / (1 – Fraction_enhanced) + (Fraction_enhanced / Speedup_enhanced). CPU time = CPU clock cycles

Processor Performance Analysis: Frame Buffer, Clock Rates, and Compilers

Posted by admin on Jan 30, 2025 in Electrical Engineering | 0 comments

Frame Buffer and Network Transmission

Consider a color display using 8 bits for each of the primary colors (R, G, B) per pixel and a frame size of 1280×1024.

1. Minimum Frame Buffer Size: The frame size is 1280 * 1024 = 1,310,720 pixels. With 3 bytes per pixel (one for each color), the minimum frame buffer size is 1,310,720 * 3 = 3,932,160 bytes.
2. Transmission Time: The transmission time over a 100 Mbit/s network is (3,932,160 * 8 bits) / (100 * 10⁶ bits/second) = 0.3145728 seconds, or 315 ms.

Processor