Understanding Microprocessor Architecture: CISC vs RISC
Microprocessor Architecture Explained
Microprocessors: A component that incorporates all the functions of the CPU on a single integrated circuit.
Technological Characteristics
- Instruction set that can run.
- Word size (number of bits) which the microprocessor processes in a single operation.
- The clock speed supported (the rate at which it can work).
- Instruction pipelining (which allows multiple instructions to be processed simultaneously in a chain-like assembly).
- Instruction set architecture.
- Data path or bus width.
Processor Architecture Definition
The definition of a processor architecture includes the concepts of instruction set architecture and organization of addressing the functional units of electronic technology components.
CISC (Complex Instruction Set Computer)
The instruction set processor is usually very wide with variable-length instructions. Some instructions are longer than others and have different numbers of fields. The control unit is usually microprogrammed. With a large number of instructions, the electronic design is more complex, making it difficult to increase its operating frequency.
RISC (Reduced Instruction Set Computer)
Reduced instruction set and simpler electronics make it easier to increase the frequency of operation. Lack of functionality is typically addressed by compilers. Post-instruction sets are simpler to replace with more complex ones than might exist in a CISC architecture.
Units of Measurement
- MHz/GHz: Equivalent to the number of processor cycles executed per second.
- MIPS: Million instructions per second.
- FLOPS: (Floating Point Operations per second) floating-point operations per second.
External Bus Speed (FSB)
Also known as the FSB speed, it’s the speed at which the CPU communicates with the motherboard. CPU Speed = Bus Speed * Multiplier Factor, usually between 100MHz and 1600MHz. The multiplier factor is the number which, when multiplied by the external speed, gives the internal speed. The multiplier must be supported by the motherboard.
Cache Memory
The buses also include a memory cache, type SRAM. It is a very fast memory that accelerates the transfer of instructions and data between the CPU and RAM. The data and instructions needed soon are kept by the CPU in the cache. Before the CPU requires data or instructions, they are transferred from RAM to cache. Changed data in the cache is transferred to the RAM. When the CPU looks for data or instructions, it first checks the cache, then the RAM, and finally the hard disk.
Cache Levels
Two Types: Cache Level 1 (L1) and Level 2 (L2) cache.
L1 Cache
Memory of very high-speed access. The first level is encapsulated within the processor core itself, eliminating delays caused by communication in other memory. Its size is very limited and is usually faster than the second level cache. It includes data cache and instruction cache.
Power Consumption
- External voltage resources / I/O: Allows the processor to communicate with the motherboard.
- Internal core voltage: Less than before, allowing the processor to work with a lower temperature.
Encapsulation
DIP, PLCC, PGA, LGA, SEC.