Understanding the 8085 Microprocessor: Architecture, Instructions, and Programming

Posted on Jun 25, 2024 in Computers

1. Introduction to the 8085 Microprocessor

1.1 Microprocessor and Programming Model

A microprocessor is an integrated circuit that serves as the central processing unit (CPU) of a computer. It performs arithmetic and logic operations, manages input/output operations, and processes data and instructions stored in memory.

The programming model of the 8085 microprocessor encompasses the registers and flags accessible to programmers. Here’s a simplified representation:

  • Accumulator (A): 8-bit register for arithmetic, logic, I/O, and data transfer.
  • Flags Register (F): 8-bit register containing five flags (Sign, Zero, Auxiliary Carry, Parity, Carry).
  • General Purpose Registers: B, C, D, E, H, and L (usable individually as 8-bit registers or in pairs as 16-bit registers: BC, DE, HL).
  • Program Counter (PC): 16-bit register storing the address of the next instruction.
  • Stack Pointer (SP): 16-bit register pointing to the top of the stack.

1.2 Architecture of the 8085

The 8085 architecture includes:

  • Accumulator (A): 8-bit register for arithmetic and logic operations.
  • Temporary Register: Holds data temporarily during operations.
  • General Purpose Registers: B, C, D, E, H, and L (8-bit registers, pairable as BC, DE, HL for 16-bit operations).
  • Program Counter (PC): 16-bit register holding the address of the next instruction.
  • Stack Pointer (SP): 16-bit register pointing to the top of the stack.
  • Instruction Register/Decoder: Fetches and decodes instructions.
  • Address Buffer and Address/Data Buffers: Interface with the system bus.
  • Arithmetic and Logic Unit (ALU): Performs arithmetic and logical operations.
  • Flags Register: Contains five flags – Sign, Zero, Auxiliary Carry, Parity, and Carry.

2. Instructions and Addressing Modes

2.1 Arithmetic Instructions

The 8085 supports arithmetic instructions like addition, subtraction, increment, and decrement:

  • ADD R/M: Adds register/memory content to the accumulator.
  • ADI Data: Adds an immediate value to the accumulator.
  • ADC R/M: Adds register/memory content and the carry flag to the accumulator.
  • ACI Data: Adds an immediate value and the carry flag to the accumulator.
  • SUB R/M: Subtracts register/memory content from the accumulator.
  • SUI Data: Subtracts an immediate value from the accumulator.
  • SBB R/M: Subtracts register/memory content and the borrow (carry) flag from the accumulator.
  • SBI Data: Subtracts an immediate value and the borrow (carry) flag from the accumulator.
  • INR R/M: Increments register/memory content by 1.
  • DCR R/M: Decrements register/memory content by 1.
  • INX RP: Increments register pair content.
  • DCX RP: Decrements register pair content.
  • DAD RP: Adds register pair content to the HL pair.

2.2 Addressing Modes

The 8085 supports these addressing modes:

  • Immediate Addressing: Operand is within the instruction (e.g., MVI A, 32H).
  • Register Addressing: Operand is in a register (e.g., MOV A, B).
  • Direct Addressing: Operand’s address is in the instruction (e.g., LDA 2000H).
  • Indirect Addressing: Operand’s address is in a register pair (e.g., MOV A, M where M is pointed to by HL).
  • Implicit Addressing: Operand is implied (e.g., CMA for Complement Accumulator).

2.3 DAD Instruction

DAD rp adds the content of register pair rp (BC, DE, or SP) to the HL register pair. For example, if HL = 1000H and BC = 2000H, DAD B results in HL = 3000H.

2.4 PUSH and POP Instructions

  • PUSH rp: Saves register pair rp‘s content onto the stack (decrements SP by 2).
  • POP rp: Restores content from the stack into register pair rp (increments SP by 2).

3. Interrupts and Memory Access

3.1 Software and Hardware Interrupts

Software Interrupts:

  • RST0 – RST7: Restart interrupts invoked using RST n (n = 0 to 7).

Hardware Interrupts:

  • TRAP: Non-maskable, highest priority.
  • RST7.5, RST6.5, RST5.5: Maskable, vectored.
  • INTR: General-purpose, requires external vectoring.

3.2 MEMORY Read Machine Cycle

  1. Opcode Fetch (T1): Microprocessor sends the memory address on the address bus.
  2. Memory Read (T2): RD signal asserted to read data from memory.
  3. Data Transfer (T3): Data from memory is placed on the data bus and read into the microprocessor.

4. Assembly Language Programming (ALP)

4.1 Instruction Formats

  • 1-Byte Instructions: Single byte (e.g., MOV A, B with opcode 78H).
  • 2-Byte Instructions: Opcode and one operand byte (e.g., MVI A, 32H with opcode 3EH followed by data 32H).
  • 3-Byte Instructions: Opcode and two operand bytes (e.g., LXI H, 2050H with opcode 21H followed by address 50H and 20H).

4.2 Example ALPs

(a) Add two 8-bit numbers with carry, store the result at 2100H:


MVI H, 00H ; Clear H register
MVI L, 2100H ; Load address 2100H into HL
MVI A, 05H ; Load the first number into the accumulator
ADD A ; Add accumulator content to itself
MOV M, A ; Store the result at 2100H
HLT ; Halt

(b) Exchange content of memory locations 3100H and 4100H:


LXI H, 3100H ; Load address 3100H into HL
MOV A, M ; Move content of 3100H into the accumulator
MOV B, A ; Move accumulator content to register B
LXI H, 4100H ; Load address 4100H into HL
MOV A, M ; Move content of 4100H into the accumulator
LXI H, 3100H ; Load address 3100H into HL
MOV M, A ; Store accumulator content at 3100H
MOV A, B ; Move register B content into the accumulator
LXI H, 4100H ; Load address 4100H into HL
MOV M, A ; Store accumulator content at 4100H
HLT ; Halt

These examples demonstrate basic arithmetic and data transfer operations in 8085 assembly language.